diff --git a/Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/L1CaloFEXSim/jFEXForwardElecAlgo.h b/Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/L1CaloFEXSim/jFEXForwardElecAlgo.h
index 601600618430374c5097556c832c538e3dee6a5e..8cfc18a6014609ebbe87d1886f5248e93ace4898 100644
--- a/Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/L1CaloFEXSim/jFEXForwardElecAlgo.h
+++ b/Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/L1CaloFEXSim/jFEXForwardElecAlgo.h
@@ -82,6 +82,7 @@ namespace LVL1 {
     
     virtual std::array<float,2> getEtaPhi(uint) override;
     virtual std::array<int,2> getEtEmHad(uint) override;
+    bool getEMSat(unsigned int ttID);
     
     bool isValidSeed(uint seedTTID);
     void findAndFillNextTT(jFEXForwardElecInfo& elCluster, int neta, int nphi);
diff --git a/Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/L1CaloFEXSim/jFEXForwardElecInfo.h b/Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/L1CaloFEXSim/jFEXForwardElecInfo.h
index 566ec94680ded8e9f25d4be6c66a9e1cac9ee75a..c89323a6c7dafffee7f54865b22f33164fc07abe 100644
--- a/Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/L1CaloFEXSim/jFEXForwardElecInfo.h
+++ b/Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/L1CaloFEXSim/jFEXForwardElecInfo.h
@@ -39,11 +39,15 @@ class jFEXForwardElecInfo {
   uint  getCoreIphi();
   uint  getCoreIeta();             //used
   void  setCoreTTEtEM(int ET_EM );//used
-  int  getCoreTTEtEM();           //used 
+  int  getCoreTTEtEM();           //used
+  void  setCoreTTSatEM(bool sat);
+  bool getCoreTTSatEM(); 
   void  setNextTTID(uint TTID );   //used  
   uint  getNextTTID();
   void  setNextTTEtEM(int ET_EM); //used 
   int  getNextTTEtEM();           //used 
+  void  setNextTTSatEM(bool sat);
+  bool getNextTTSatEM();
   void  setTTEtEMiso(int iso_ET); //used     
   void  addTTEtEMiso(int iso_ET);  //used 
   int  getTTEtEMiso();
@@ -54,6 +58,7 @@ class jFEXForwardElecInfo {
   int  getTTEtHad2();
   void  calcTTClusEtEM();          //used
   int  getTTClusEtEM();           //used
+  bool getTTClusSatEM();
   void  includeTTinSearchWindow(uint TT_ID);
   std::vector<uint> getTTinSearchWindow();
   // floating point values
@@ -82,12 +87,15 @@ class jFEXForwardElecInfo {
  private:
 
   int  m_coreTTEtEM = 0;
+  bool m_coreTTsatEM = false;
   uint  m_nextTTID = 0;
   int  m_nextTTEtEM = 0;
+  bool m_nextTTsatEM = false;
   int  m_TTEtEMiso = 0;
   int  m_TTEtHad1 = 0;
   int  m_TTEtHad2 = 0;
   int  m_TTClusEtEM = 0;
+  bool m_TTClusSatEM = false;
   float m_coreTTfEta = 0;
   float m_coreTTfPhi = 0;
   std::vector<uint> m_TTsInSearchWindow = {};
diff --git a/Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/L1CaloFEXSim/jFEXmetAlgo.h b/Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/L1CaloFEXSim/jFEXmetAlgo.h
index 8b4b6a21193208a88312305d69a66da175d01112..63947cce75f5ab93d410a6f07b2bbc1ada28a143 100644
--- a/Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/L1CaloFEXSim/jFEXmetAlgo.h
+++ b/Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/L1CaloFEXSim/jFEXmetAlgo.h
@@ -61,12 +61,12 @@ protected:
         std::vector<std::vector<int>> m_FPGA;
         std::vector<std::vector<int>> m_FPGA_phi02;
         std::vector<std::vector<int>> m_FPGA_fcal;
-        std::vector<int> m_met;
+        std::vector<long long> m_met;
         std::vector<float> m_met_angle;
-        std::vector<int> m_met_Xcoord;
-        std::vector<int> m_met_Ycoord;
-        int m_Totalmet_Xcoord = 0;
-        int m_Totalmet_Ycoord = 0;
+        std::vector<long long> m_met_Xcoord;
+        std::vector<long long> m_met_Ycoord;
+        long long m_Totalmet_Xcoord = 0;
+        long long m_Totalmet_Ycoord = 0;
         
         bool getTTowerSat(unsigned int TTID );
         bool m_saturation = false;
@@ -76,6 +76,7 @@ protected:
         
         // To avoid using floats in the firmware.
         static constexpr unsigned int m_firmware_scale = (1 << 9);
+        static constexpr unsigned int m_firmware_bit_offset = 9;
         
         std::unordered_map<int,std::vector<int> > m_map_Etvalues;
         
diff --git a/Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/src/jFEXFormTOBs.cxx b/Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/src/jFEXFormTOBs.cxx
index ff833f058527bac05838b665b148fd2845ba3208..6b27e1157db1b2e8ea0312721d076065dd2b9f1f 100644
--- a/Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/src/jFEXFormTOBs.cxx
+++ b/Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/src/jFEXFormTOBs.cxx
@@ -292,16 +292,25 @@ uint32_t jFEXFormTOBs::formMetTOB(int METX, int METY, bool sat, int Resolution )
     //0x7fff is 15 bits (decimal value 32767), however as MET is a signed value (can be negative) only 14 bits are allowed (16383) the MSB is the sign
     if (std::abs(metX) > 0x3fff) {
         ATH_MSG_DEBUG("sumEtlow saturated: " << metX );
-        metX = 0x3fff;
+        if (metX < 0) {
+            metX = 0x4000; //most negative value for 15b signed two's complement
+        } else {
+            metX = 0x3fff;
+        }
     }
 
     
     if (std::abs(metY) > 0x3fff) { //0x7fff is 15 bits (decimal value 32767), however as MET is a signed value (can be negative) only 14 bits are allowed (16383)
         ATH_MSG_DEBUG("sumEthigh saturated: " << metY );
-        metY = 0x3fff;
+        if (metY < 0) {
+            metY = 0x4000; //most negative value for 15b signed two's complement
+        } else {
+            metY = 0x3fff;
+        }
     }
 
     //create basic tobword with 32 bits
+    //note that the bit-wise and with the 15bit mask (0x7fff) inherently accounts for the conversion of negative values from 32b signed (int) to 15b signed
     tobWord = tobWord + (res << FEXAlgoSpaceDefs::jXE_ResBit) + ((metY & 0x7fff) << FEXAlgoSpaceDefs::jXE_Ey_Bit) + ((metX & 0x7fff) << FEXAlgoSpaceDefs::jXE_Ex_Bit) + (Sat << FEXAlgoSpaceDefs::jXE_SatBit)  ;
     ATH_MSG_DEBUG("tobword MET with Res, MET_Y, MET_X, Sat: " << std::bitset<32>(tobWord) );
 
diff --git a/Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/src/jFEXForwardElecAlgo.cxx b/Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/src/jFEXForwardElecAlgo.cxx
index e7da31347effa4c1522a9b07953c126140a4a81f..98b625f54df2238eb1c3a31b08e3fc27ed23f9c3 100644
--- a/Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/src/jFEXForwardElecAlgo.cxx
+++ b/Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/src/jFEXForwardElecAlgo.cxx
@@ -95,6 +95,15 @@ namespace LVL1 {
     return {TT_EtEM, TT_EtHad};
   }
 
+  bool LVL1::jFEXForwardElecAlgo::getEMSat(unsigned int ttID ) {
+    if(ttID == 0) {
+        return false;
+    } 
+    
+    const LVL1::jTower * tmpTower = m_jTowerContainer->findTower(ttID);
+    return tmpTower->getEMSat();
+  }
+
   void LVL1::jFEXForwardElecAlgo::setFPGAEnergy(
     std::unordered_map<int,std::vector<int> > etmapEM,
     std::unordered_map<int,std::vector<int> > etmapHAD) {
@@ -129,7 +138,7 @@ namespace LVL1 {
       }
       for (const auto& gtt : it_seed_map->second ){
         auto [tmp_EtEM,tmp_EtHad] = getEtEmHad(gtt);
-        if( tmp_EtEM>=centreTT_EtEM) {
+        if( tmp_EtEM>centreTT_EtEM) {
           return false;
         }
       }
@@ -217,6 +226,7 @@ namespace LVL1 {
       if (candTT_EtEM > elCluster.getNextTTEtEM()) {
         elCluster.setNextTTEtEM(candTT_EtEM);
         elCluster.setNextTTID(candID);
+        elCluster.setNextTTSatEM(getEMSat(candID));
       }
     }
     
@@ -278,7 +288,8 @@ namespace LVL1 {
           const auto [centreTT_EtEM, centreTT_EtHad] = getEtEmHad(ttID);
           elCluster.setCoreTTfPhi(centreTT_phi);
           elCluster.setCoreTTfEta(centreTT_eta);
-          elCluster.setCoreTTEtEM(centreTT_EtEM);                  
+          elCluster.setCoreTTEtEM(centreTT_EtEM);  
+          elCluster.setCoreTTSatEM(getEMSat(ttID));                
           elCluster.setNextTTEtEM(0);
           elCluster.setNextTTID(0);
           elCluster.setTTEtEMiso(0);
diff --git a/Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/src/jFEXForwardElecInfo.cxx b/Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/src/jFEXForwardElecInfo.cxx
index 8fc462846209863500e21ff3b69bfd676669f2ac..14c9050df09bc99663015aee7be5d0adc4734dde 100644
--- a/Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/src/jFEXForwardElecInfo.cxx
+++ b/Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/src/jFEXForwardElecInfo.cxx
@@ -78,6 +78,14 @@ int   LVL1::jFEXForwardElecInfo::getCoreTTEtEM(){
   return m_coreTTEtEM;
 }
 
+void   LVL1::jFEXForwardElecInfo::setCoreTTSatEM(bool sat ){
+   m_coreTTsatEM  = sat;
+}
+
+bool   LVL1::jFEXForwardElecInfo::getCoreTTSatEM(){
+  return m_coreTTsatEM;
+}
+
 void   LVL1::jFEXForwardElecInfo::setNextTTID(uint TTID ){
   m_nextTTID = TTID;
 }
@@ -94,6 +102,14 @@ int   LVL1::jFEXForwardElecInfo::getNextTTEtEM(){
   return m_nextTTEtEM;
 }
 
+void   LVL1::jFEXForwardElecInfo::setNextTTSatEM(bool sat){
+  m_nextTTsatEM = sat;
+}
+
+bool   LVL1::jFEXForwardElecInfo::getNextTTSatEM(){
+  return m_nextTTsatEM;
+}
+
 void   LVL1::jFEXForwardElecInfo::setTTEtEMiso(int iso_ET){
   m_TTEtEMiso  = iso_ET;
 }
@@ -108,12 +124,17 @@ int   LVL1::jFEXForwardElecInfo::getTTEtEMiso(){
 
 void   LVL1::jFEXForwardElecInfo::calcTTClusEtEM(){
   m_TTClusEtEM   = m_coreTTEtEM + m_nextTTEtEM;
+  m_TTClusSatEM = m_coreTTsatEM || m_nextTTsatEM;
 }
 
 int   LVL1::jFEXForwardElecInfo::getTTClusEtEM(){
   return m_TTClusEtEM ;
 }
 
+bool  LVL1::jFEXForwardElecInfo::getTTClusSatEM(){
+  return m_TTClusSatEM ;
+}
+
 void   LVL1::jFEXForwardElecInfo::setTTEtHad1(int ET_HAD){
   m_TTEtHad1 = ET_HAD;
 }
@@ -224,11 +245,13 @@ void LVL1::jFEXForwardElecInfo::calcFwdElEDM() {
     m_EtHad2  =  m_TTEtHad2/m_reso;
     m_EtEM    =  m_coreTTEtEM/m_reso;   
  }
+  
   if (m_et > 0x7ff) { //0x7ff is 11 bits
     m_et = 0x7ff;
-    m_sat=1;
+    //current FW convention is to NOT set the saturation bit on value overflow, but only to propagate cell saturation information from LAr
+    //m_sat=1;
   }
-
+  m_sat = m_TTClusSatEM;
 
 
   // jFEX internal values are at higher granularity (25MeV), not output granularity (200MeV).
@@ -258,7 +281,6 @@ void LVL1::jFEXForwardElecInfo::calcFwdElEDM() {
   }
 
   m_tob = m_tob + (m_res <<  FEXAlgoSpaceDefs::jEM_resBit) +  (m_emfr2 <<  FEXAlgoSpaceDefs::jEM_emf2Bit) +  (m_emfr1 <<  FEXAlgoSpaceDefs::jEM_emf1Bit) + ( m_emiso << FEXAlgoSpaceDefs::jEM_isoBit) + (m_et << FEXAlgoSpaceDefs::jEM_etBit) + (m_eta << FEXAlgoSpaceDefs::jEM_etaBit) + (m_phi << FEXAlgoSpaceDefs::jEM_phiBit) + m_sat;
-
 }
 
 
diff --git a/Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/src/jFEXmetAlgo.cxx b/Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/src/jFEXmetAlgo.cxx
index 13228aab1b1c2743df5b0261f36f1a4847e0b929..824d809f9e6cd5a85a9df09b730efab4e517b6dd 100644
--- a/Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/src/jFEXmetAlgo.cxx
+++ b/Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/src/jFEXmetAlgo.cxx
@@ -123,7 +123,6 @@ void LVL1::jFEXmetAlgo::buildBarrelmet()
         const LVL1::jTower * tmpTower = m_jTowerContainer->findTower(m_FPGA[iphi][0]);
         m_met_angle[iphi]=tmpTower->centrephi_toPI();
     }
-    
     buildMetXComponent();
     buildMetYComponent();
 }
@@ -136,7 +135,6 @@ void LVL1::jFEXmetAlgo::buildFWDmet()
     m_Totalmet_Xcoord=0;
     m_Totalmet_Ycoord=0;
     
-    
     //Granularity of phi = 0.1
     m_met.clear();
     m_met.resize(m_FPGA.size(),0);
@@ -184,6 +182,7 @@ void LVL1::jFEXmetAlgo::buildFWDmet()
     }
     buildMetXComponent();
     buildMetYComponent();
+    
 }
 
 //build Met X component for the central barrels
@@ -208,7 +207,7 @@ void LVL1::jFEXmetAlgo::buildMetXComponent()
 //return the X component of the Met
 int LVL1::jFEXmetAlgo::GetMetXComponent()
 {
-    return std::floor(1.0*m_Totalmet_Xcoord/m_firmware_scale);
+    return m_Totalmet_Xcoord >> m_firmware_bit_offset;
 }
 
 //build Met Y component for the central barrels
@@ -232,7 +231,7 @@ void LVL1::jFEXmetAlgo::buildMetYComponent()
 //return the Y component of the Met
 int LVL1::jFEXmetAlgo::GetMetYComponent()
 {
-    return std::floor(1.0*m_Totalmet_Ycoord/m_firmware_scale);
+    return m_Totalmet_Ycoord >> m_firmware_bit_offset;
 }
 
 //Gets the ET for the TT. This ET is EM + HAD