Alternative "IP" packaging for platform logic and user block diagram entrypoint

As discussed on the DI/OT Developers Meeting #1 and on #65 (closed), the packaging of the platform-provided logic should be presented to the user using block design containers. This allows the user to see the gate logic, presented in read-only fashion in the main block design.

Consequently, the pre-baked IPs stored in the project's gateware folder were erased, with the exception of their documentation. To be discussed what to do with it. This was moved to the separate MR !93 (merged).

Also, this MR implements the discussed inclusion/modification user entrypoint for the block design (#74 (closed)), through the user_bd.tcl file. As a small demo on how this file can be used, I've included a LED blinker demo on the Peripheral Reset LED. This demo can be enabled or disabled by setting a variable (synth_demo in user_bd.tcl).

Demo is yet to be tested on hardware, hence this MR is a draft for now. Demo has been tested, ready to merge.