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Created date
Fixes to module communicaiton
!22
· created
Jan 10, 2020
by
Karol Krizka
master
Merged
updated
Feb 25, 2020
WIP: Implement HV tests on the active board
!21
· created
Dec 25, 2019
by
Karol Krizka
Closed
updated
May 01, 2020
ITSDAQ I2C Support
!20
· created
Dec 25, 2019
by
Karol Krizka
master
Merged
updated
Dec 25, 2019
Powerboard control via ITSDAQ UDP
!19
· created
Dec 18, 2019
by
Karol Krizka
master
Merged
updated
Dec 18, 2019
ADC channel mapping and getVset()
!18
· created
Dec 06, 2019
by
Evan Paul Mladina
active
Closed
updated
Feb 12, 2020
Implement an abstracted test bench
!17
· created
Oct 31, 2019
by
Karol Krizka
active
Merged
updated
Nov 07, 2019
HSIO-based AMAC communication.
!16
· created
Oct 30, 2019
by
Karol Krizka
master
Merged
updated
Nov 22, 2019
ADC and DAC channel assignment in header. Addition of 10th pb in .cpp
!14
· created
Oct 22, 2019
by
Evan Paul Mladina
active
Merged
updated
Oct 31, 2019
Add scripts for turning on/off a module.
!13
· created
Oct 21, 2019
by
Karol Krizka
master
Merged
updated
Oct 21, 2019
Updates to the readme.
!12
· created
Oct 19, 2019
by
Karol Krizka
master
Merged
updated
Oct 19, 2019
Add testing via the mass test system.
!11
· created
Sep 27, 2019
by
Karol Krizka
master
massive
Merged
updated
Oct 18, 2019
CMake3-ify compilation.
!10
· created
Sep 22, 2019
by
Karol Krizka
master
CMake
Merged
updated
Sep 22, 2019
Em optional hv power supply basic test
!8
· created
Aug 16, 2019
by
Evan Paul Mladina
master
Database scripts
!6
· created
Aug 16, 2019
by
Evan Paul Mladina
master
updated
Sep 03, 2019
Database scripts
!3
· created
Aug 16, 2019
by
Evan Paul Mladina
master
Closed
updated
Aug 16, 2019
Moduletest stripslab
!2
· created
Aug 14, 2019
by
Gregory James Ottino
moduletest
3
updated
Aug 19, 2019
Optional HV powersupply connection, read register timeout fix, production database scripts
!1
· created
Jun 28, 2019
by
Evan Paul Mladina
master
Closed
3
updated
Aug 16, 2019
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