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Added simulation

Jan Pospisil requested to merge jp_v2 into system-v2

The simulation was added/fixed and few more small fixed/updates were done, like:

  • better parametrization
  • fixed some (System)Verilog warnings

I've copied even more stuff from BI-Cores to keep VFC-HD_System self contained also for the simulation. Is it OK?

Edited by Jan Pospisil

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