Ddr3 debug
Fixed bug in D19cFWInterface when only sub-set of ROCs are enabled. Modified CICInterface and FEAlignment to enable running with a sub-set of the CBCs on a 2S hybrid/module.
Fixed bug in D19cFWInterface when only sub-set of ROCs are enabled. Modified CICInterface and FEAlignment to enable running with a sub-set of the CBCs on a 2S hybrid/module.