Coherence between the GEx/1 and ME0 S-bit registers

Looking into the online software compatibility with ME0, it appears that the basic S-bit counter registers are rather different between GEx/1 and ME0. While it is easily understandable that the top node is different (the trigger paths are different), it is less clear why the register structure is so different. Since the goal is to use the same online software and routines between all GEM stations and backend boards, a unified/coherent register scheme should be implemented when the features match.

In this specific case, the proposal is to adjust the ME0 S-bit counter registers to the GEx/1 ones. The top nodes would be BEFE.GEM.OH.OHxx.FPGA.TRIG.CNT and BEFE.GEM.SBIT_ME0.OHxx.CNT for respectively GEx/1 and ME0. The registers below this node need to be slightly reorganized. Amongst others, the removal of the _ME0 suffix is required (except for uniformity reasons this is not the most useful information considering we are already under the SBIT_ME0 node).