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Demonstration on how a DSP block instantiated as System Generator model is simulated differently in System Generator than (once exported as an IP Core) in Vivado
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Ester Maria Silva Jimenez / bdaq53
BSD 3-Clause "New" or "Revised" LicenseDAQ and test system for the RD53A readout chip
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Instantiation of Linear-Regression module in TM Track-Finder extensible firmware framework.
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Declan Millar / delphes
Creative Commons Attribution Share Alike 4.0 InternationalA framework for fast simulation of a generic collider experiment
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Christos Bakalis / VSB_DAQ
GNU General Public License v3.0 onlyDAQ supervisory board firmware design for VMM/FPGA-bearing boards. It integrates trigger selection logic, a trigger data processing module and busy logic into a single FPGA that connects to multiple front-end nodes.
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Engin Eren / xfitter
GNU General Public License v3.0 onlyArchived 0Updated -
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This repository contains necessary files to test Linear-Regression High-Level Synthesis implementation.
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Project based on UQDS v2.x to test the new DQQDIDT board.
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Firmware dedicated to the communication with the GBTx ASIC
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