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Firmware dedicated to the communication with the GBTx ASIC
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This project is for doing more detail simulation for New_MDT_TDC ssh://git@gitlab.cern.ch:7999/yuliang/New_TDC.git
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This repository contains schemes, digital design and documentation of the new MCOI platform, which using Enclustra XU5 module with FPGA ZYNQ (XCZU4EV-SFVC784)
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A new time-to-digital converter (TDC) ASIC prototype is required for the ATLAS Monitored Drift Tube (MDT) detector. This the logic part of this ASIC with TMR. The reference version without TMR is ssh://git@gitlab.cern.ch:7999/yuliang/New_TDC.git
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Oleksandr Zenaiev / xfitter
GNU General Public License v3.0 onlyArchived 0Updated -
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Demonstration on how a DSP block instantiated as System Generator model is simulated differently in System Generator than (once exported as an IP Core) in Vivado
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Engin Eren / xfitter
GNU General Public License v3.0 onlyArchived 0Updated -
This repository contains necessary files to test Linear-Regression High-Level Synthesis implementation.
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