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GBT-SC for FPGA: This module (VHDL) allows performing slow-control of the front-end through GBT links (GBTx and SCA configuration)
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BE-CEM-EDL / Common / cheby
GNU General Public License v3.0 or laterUpdated -
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HPTD / tclink
CERN Open Hardware Licence Version 2 - Weakly ReciprocalTiming Compensated Link
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Repository for the Level-0 Muon Barrel
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Wrapper code to integrate the particle flow HLS code into mp7fw.
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Firmware for the PBv3 mass tester active board.
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Example design: implementation of the LpGBT-FPGA in a simulation testbench
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