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This repository contains necessary files to test Linear-Regression High-Level Synthesis implementation.
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Basic pin-out build to check pin-planning and ADC clocking structures
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HDLC for GBT-SCA communication part of DCS work in CRU project.
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Rafael Goncalves Gama / bdaq53
BSD 3-Clause "New" or "Revised" LicenseDAQ and test system for the RD53 readout chips
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For testing the frequency of Arria 10 Development board
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Firmware dedicated to the communication with the GBTx ASIC
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This project contains Si5341 internal PLL programming for 240 MHz generation on Reflex Arria10 Board
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Christos Bakalis / gbt-fpga_vc709
GNU General Public License v3.0 onlyGBT-FPGA Implementation on a Xilinx VC709 Evaluation Board
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