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LiteDTU starting from version 1.2

DAQ and test system for the RD53 readout chips

ITk Strips HCCStar Hardware Emulator

Instantiation of Linear-Regression module in TM Track-Finder extensible firmware framework.

Basic pin-out build to check pin-planning and ADC clocking structures

This repository contains necessary files to test Linear-Regression High-Level Synthesis implementation.

See https://github.com/scipp-atlas/mario-mapyde

GBT-SC for FPGA: This module (VHDL) allows performing slow-control of the front-end through GBT links (GBTx and SCA configuration)