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A new time-to-digital converter (TDC) ASIC prototype is required for the ATLAS Monitored Drift Tube (MDT) detector. This the logic part of this ASIC with TMR. The reference version without TMR is ssh://git@gitlab.cern.ch:7999/yuliang/New_TDC.git
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This project is for doing more detail simulation for New_MDT_TDC ssh://git@gitlab.cern.ch:7999/yuliang/New_TDC.git
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This repository contains schemes, digital design and documentation of the new MCOI platform, which using Enclustra XU5 module with FPGA ZYNQ (XCZU4EV-SFVC784)
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Firmware dedicated to the communication with the GBTx ASIC
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Yanliang Han / PLACET
GNU General Public License v2.0 or laterProgram for Linear Accelerator Correction and Efficiency Tests
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The implementation of Linear-Regression algorithm from CMSSW to HLS in ten branches and step-wise fashion.
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Rafael Goncalves Gama / bdaq53
BSD 3-Clause "New" or "Revised" LicenseDAQ and test system for the RD53 readout chips
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Christos Bakalis / sca-extension
GNU General Public License v3.0 onlyThe SCA eXtension (SCAX) is a module designed in order for the users to have full control over the configuration registers of FPGA-based systems in the ATLAS NSW via FELIX.
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Christos Bakalis / elink_wrapper
GNU General Public License v3.0 onlyarchived 0Updated -
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Basic pin-out build to check pin-planning and ADC clocking structures
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Instantiation of Linear-Regression module in TM Track-Finder extensible firmware framework.
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