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GBT-SC for FPGA: This module (VHDL) allows performing slow-control of the front-end through GBT links (GBTx and SCA configuration)
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atlas-tdaq-felix / wuppercodegen
Apache License 2.0[MD, FS] JINJA based register automatic generation tool
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This repository contains all of the files required to play with the IPMC Tester:
CPLD project MMC source code ucMGT source code IPMC binaries to execute and automatic test Automatic tester (python script)Updated -
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The BTrain-over-WhiteRabbit project provides a set of IP cores that implement a transport layer to be used for transmission of BTrain-related information over WR network. See project wiki
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Example design: implementation of the LpGBT-FPGA in a simulation testbench
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Sioni Paris Summers / conifer
Apache License 2.0Fast inference of Boosted Decision Trees in FPGAs
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