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Collection of WRTD reference designs provided by (and used at) CERN
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Dimitris Exarchou / bdaq53
BSD 3-Clause "New" or "Revised" LicenseDAQ and test system for the RD53 readout chips
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Implementation of a manual in-system eye scan for GTY in Ultrascale+
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Tower Builder model in System Verilog for integration into VHDL
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A minimal TTC system based on a PicZED + carrier board to be used as a TTC source in a lab setup.
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Interface to ADC on CaR Board v1.x, component AD9249
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Antonio Bergnoli / surf
Lawrence Berkeley National Labs BSD variant licenseA huge VHDL library for FPGA development
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Abdelali Slimani Cherif / bdaq53
BSD 3-Clause "New" or "Revised" LicenseDAQ and test system for the RD53 readout chips
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