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Lingxin Meng / bdaq53
BSD 3-Clause "New" or "Revised" LicenseDAQ and test system for the RD53 readout chips
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Thomas Strebler / bdaq53
BSD 3-Clause "New" or "Revised" LicenseDAQ and test system for the RD53A readout chip
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Mikkel Weis Kallesoe / bdaq53
BSD 3-Clause "New" or "Revised" LicenseDAQ and test system for the RD53 readout chips
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silab / bdaq53
BSD 3-Clause "New" or "Revised" LicenseDAQ and test system for the RD53 readout chips
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Sebastien Wertz / bdaq53
BSD 3-Clause "New" or "Revised" LicenseDAQ and test system for the RD53A readout chip
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Abdelali Slimani Cherif / bdaq53
BSD 3-Clause "New" or "Revised" LicenseDAQ and test system for the RD53 readout chips
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Rafael Goncalves Gama / bdaq53
BSD 3-Clause "New" or "Revised" LicenseDAQ and test system for the RD53 readout chips
Archived 0Updated -
Caleb James Smith / bdaq53
BSD 3-Clause "New" or "Revised" LicenseDAQ and test system for the RD53 readout chips: fork for use at the University of Kansas.
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Ester Maria Silva Jimenez / bdaq53
BSD 3-Clause "New" or "Revised" LicenseDAQ and test system for the RD53A readout chip
Archived 0Updated -
Dimitris Exarchou / bdaq53
BSD 3-Clause "New" or "Revised" LicenseDAQ and test system for the RD53 readout chips
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Andrea Paterno / bdaq53
BSD 3-Clause "New" or "Revised" LicenseDAQ and test system for the RD53A readout chip
Updated -
Ali Skaf / bdaq53
BSD 3-Clause "New" or "Revised" LicenseDAQ and test system for the RD53 readout chips
Updated -
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IP for Caribou Peary firmware: Data FIFO with AXI interface to CPU
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Module for adding timestamp information into the data stream.
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HW IP core for controlling the pulser on the CaR board over an AXI bus
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Clock domain crossing with phase scan procedure included.
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