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Interface to ADC on CaR Board v1.x, component AD9249
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A port of Cyclone-V-ADC-UART to the LASP framework
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ALICE ITS LS2 upgrade working package 10 (WP10) Readout Unit simulation
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A simple piece of VHDL that will generate some 8b10b encoded packages for the HGTD altiroc emulator https://gitlab.cern.ch/atlas-hgtd/hgtd-peb/-/blob/master/Demonstration/module%20emulator%20v2/module_emulator_v2.pdf
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