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Boreal Caribou Firmware Modules

BST implementation for FPGA

The BTrain-over-WhiteRabbit project provides a set of IP cores that implement a transport layer to be used for transmission of BTrain-related information over WR network. See project wiki

The BTrain-over-WhiteRabbit project provides a set of IP cores that implement a transport layer to be used for transmission of BTrain-related information over WR network. See project wiki

Implementation of CALO data processing module using Intel oneAPI HLS

IP for Caribou Peary firmware: Data FIFO with AXI interface to CPU

Module for adding timestamp information into the data stream.

Control for CaR board pulsers

HW IP core for controlling the pulser on the CaR board over an AXI bus

RTL and verification code of the CLICpix2 chip.

CMS Phase2 RCT HLS Project

Sources, scripts and generated ip-cores. https://github.com/fpgasystems/davos https://github.com/fpgasystems/fpga-network-stack/

This is a project with the documentation, firmware and software for the ATLAS Tile Calorimeter read-out link and control board, namely the DaughterBoard.

Firmware development for TileCal Daughterboard revision 6