Explore projects
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Optimized GBT-FPGA : single channel and multi-channel examples on VC709
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cloned from BE-BI/VFC-HD, with public access and WhiteRabbit additions
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Open Source VHDL Verification Component Framework for making structured VHDL testbenches for verification of FPGA and ASIC.
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Project containing design files for my experimentation with the GBT link
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Archive of general-cores (https://www.ohwr.org/projects/general-cores/repository), made on 05 March 2018, to keep all commits and "private" user branches, before cleaning up the OHWR repository itself.
!! DO NOT USE IT FOR NEW DEVELOPMENTS !!
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