Former-commit-id: 0faf0ac7

This reverts merge request !5077

Former-commit-id: 66230dfee7d025090bf9740e979206c779c6f072

Marija Vranjes Milosavljevic authored 7 years ago and Tim Martin committed 7 years ago

Add AllTE algorithm  to stream suspicious L1Topo events, ATR-17089

See merge request !5077

Former-commit-id: 8c464fc111421946f92787b1045c1d5cf159ebfa

Former-commit-id: 571d424a1d8cd78ee3f15fea311a611e5fb161b1

Werner Wiedenmann authored 7 years ago and Oleg Kuprash committed 7 years ago

The update adresses the following issues:

1) Synchonize immediately the caches of the DCM and the ROB data provider
   service for prefetching requests and avoid single ROB prefetching requests.
2) Use proper interface cast for tigger ROB data provider service in steering
   to allow full event building requests issued by steering. Do full event building
   requests only for physics events.
3) Avoid duplication of methods in the ITrigROBDataProviderSvc_RTT interface with the
   ITrigROBDataProviderSvc and IROBDataProviderSvc interfaces.


Former-commit-id: f3392b03

Details:
Move the function `formatVecHex8` to L1Topo::Helpers so that it can be
re-used (it was marked as 'todo').
Drop the function `formatHex1` that is not being used anywhere.

Former-commit-id: cec092e99fd280af2d35a8348556c3c2a4a34f26

Former-commit-id: 77f7f867070320a76192375e984ab639bdfdf2a2

Details:
in !1359 I forgot to reset the simulated overflow bits. This would
show up as a rootcomp error in the `run_stop_run` test.  This MR fixes
this bug, and resolves ATR-16939.
It will also improve the hdw-sim agreement of the overflow bits.

Former-commit-id: b59ae268d0d276744d7195ef62a63501bab448cc

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Former-commit-id: f8f70a897e3b368ce56a022d32e27c9f7448fe84

Details:
this is an additional monitoring that we need while the ROIB readout
is scrambled. It compares the trigger bits from L1Topo with the ones
at the CTP input. The L1Topo bits are OR'ed with the overflow bits, in
the same way as already done for the ROIB bits in the histogram
`CTP_Hdw_vs_L1Topo_Hdw_Events`.

Former-commit-id: 55a6854ec52087bf408342b8a8b0a89c5d292e86

Details ROB RDO are read out with a prescale to avoid straining the ROS


Former-commit-id: 4eba254ba436fecf53104d0ecb6639d5b2510f59

Details:
The histograms for the hdw-sim comparison using hdw bits from the DAQ
readout were being filled before `doSimMon`, that is before the
simulated bits were filled.
Move the filling of these histograms to a separate function `doSimDaq`
that is called after `doSimMon`.

Former-commit-id: cf7169f7b4e5638baffbec4ddb97e2fb643656dd

Details:
This will allow us to make the hdw-sim comparison plots also for the
bits sent over the DAQ ROB.

Note that for the simulation histogram the entries will not be the
same as for the ROIB existing histo (prescaled filling).


Former-commit-id: 65af4865c787e721b50bb686bfe7515103618dc9

Details:
This comparison helps detect events in which there is a mismatch
between the readout of the L1Topo CTP bits in the main "DAQ" (ROS)
readout which also has the inputs TOBs and the smaller fragment we
send to the RoIB which just contains the CTP bits.

The comparison of all the words is non-trivial, because of different
ordering and zero suppression (that is, some TOBs could be missing
from the DAQ output). So what is being done here is that I compare
only the 128 decision bits (the overflow bitset is also computed, but
not being compared for now).

This is done by taking the L1Topo TOBs for BC0 from the DAQ ROB, which
are available in `daqTobsBC0`, and map them on a bitset[128] in the
same way being done for `m_triggerBits`, which already contains the
trigger bits from the ROI TOBs.

This code has been tested with RAW files from 2016 (run 311071, in
which the readout was working properly) and RAW files from 2017 (run
324320, for which @landon reported mismatches).


Former-commit-id: 6d4590e9eb41590955822774928e5da159087a67

Details:
this is an additional monitoring that we need while the ROIB readout
is scrambled. It compares the trigger bits from L1Topo with the ones
at the CTP input. The L1Topo bits are OR'ed with the overflow bits, in
the same way as already done for the ROIB bits in the histogram
`CTP_Hdw_vs_L1Topo_Hdw_Events`.

Former-commit-id: 548b52d53d0e6cff948b422970490d53caba1a09

Details ROB RDO are read out with a prescale to avoid straining the ROS


Former-commit-id: 3271e6d1cfaafea2e5b7bf11d7d42d62dad1cc06

Details:
The histograms for the hdw-sim comparison using hdw bits from the DAQ
readout were being filled before `doSimMon`, that is before the
simulated bits were filled.
Move the filling of these histograms to a separate function `doSimDaq`
that is called after `doSimMon`.

Former-commit-id: b484d1bc0be7d9a21160d4b51f3c8233d1634c60

Was filling the existing histos.


Former-commit-id: 52b8bb262d2b5231b47cd9f19f05cc1f7b1e14eb

Details:
This will allow us to make the hdw-sim comparison plots also for the
bits sent over the DAQ ROB.

Note that for the simulation histogram the entries will not be the
same as for the ROIB existing histo (prescaled filling).


Former-commit-id: 0a46a13889031b3426e20c8c3918e060363263d3

Former-commit-id: cfe80403d10a981474c4fa04d730efaeaaf9e7a1

L1topo overflow

See merge request !1359

Former-commit-id: d7ad73a2

Details:
This comparison helps detect events in which there is a mismatch
between the readout of the L1Topo CTP bits in the main "DAQ" (ROS)
readout which also has the inputs TOBs and the smaller fragment we
send to the RoIB which just contains the CTP bits.

The comparison of all the words is non-trivial, because of different
ordering and zero suppression (that is, some TOBs could be missing
from the DAQ output). So what is being done here is that I compare
only the 128 decision bits (the overflow bitset is also computed, but
not being compared for now).

This is done by taking the L1Topo TOBs for BC0 from the DAQ ROB, which
are available in `daqTobsBC0`, and map them on a bitset[128] in the
same way being done for `m_triggerBits`, which already contains the
trigger bits from the ROI TOBs.

This code has been tested with RAW files from 2016 (run 311071, in
which the readout was working properly) and RAW files from 2017 (run
324320, for which @landon reported mismatches).


Former-commit-id: 1f6a681c6e26e247cca4113724ad28c8996cde53

pull tag TrigOnlineMonitor-20-00-46 from svn

See merge request !1753

Former-commit-id: 5b0bab9c24b6f331f91fb372eadc351fa657d4d0

Details:
Within `TrigL1TopoROBMonitor::doOverflowSimMon` I was filling the
histograms with the counters of the hdw-sim decisions, not the
overflow ones (copy-and-paste mistake).

Now the corresponding 4 overflow histograms (sim, hdw, sim-not-hdw,
hdw-not-sim) are booked and filled. The XOR histogram used in
`compBitSets` was already being booked and filled correctly.


Former-commit-id: 0aec3da3abcb2e956ed87d24a968f9cb22fdc7bb

This tag was not picked up during the svn --> git transition.

It fixes ATR-14417
This tag pulls in the two changes below:
- TrigOnlineMonitor-20-00-44 by @fwinkl: Code modernizatin and remove
  obsolete histogram lock
- TrigOnlineMonitor-20-00-46 by @gerbaudo: fix ATR-14417

Note to self: these are the commands I used to pull from svn:
```
lsetup git python
git clone ssh://git@gitlab.cern.ch:7999/gerbaudo/athena.git
cd athena/
git remote add upstream ssh://git@gitlab.cern.ch:7999/atlas/athena.git
git fetch upstream
git checkout -b pull-TrigOnlineMonitor-20-00-46 upstream/21.1
svnpull.py HLT/Trigger/TrigMonitoring/TrigOnlineMonitor+tags/TrigOnlineMonitor-20-00-46
```
then add, commit, and push.


Former-commit-id: 688309de149ebc77357a7927ae152abebb6d1297

Details:
that was the last bit needed to fill the sim-hdw overflow comparison.

Former-commit-id: 172ed964caf9080cfc93255add6b26ae61895ba7

It compiles.


Former-commit-id: 9626fe74324f5abecdd729a8dea904cb722121db

Former-commit-id: 8542a18b

Former-commit-id: 30b5904d95ab777fb1bfb4993c1ad6e92df33f75

Former-commit-id: 0c1598fa

Former-commit-id: 64e88689656bab47a0515af708f9786984bbe3b4

Initializes the ROBDataProviderSvc and calls setNextEvent() if it has received
a valid full event. The event status is always set to 0, since we have no
option to pass invalid fragments along.


Former-commit-id: 27c4c1209685bd01c14b520e5b78cc7ada88d7b1

Former-commit-id: ed24f027d8966444c626ac558183c377b72692b0

Former-commit-id: 2883b91a800ca02aed72befec1608a8c9a2072cc

	* python/hltOksUtils.py: Automatically define correct binary tags
	* share/make_hlt_rep.py: Changes for git release
	* HLTUtils-01-04-02


Former-commit-id: 504c040e716ca2ad59c1014b6e9dee2c362f0e0d

	* Remove hack in asetup_wrapper, fix PATH
	* HLTUtils-01-04-01


Former-commit-id: 38eaafae

	* TrigServices-20-10-17
	* src/HltEventLoopMgr.cxx: remove unnecessary histogram locks, fix some histogram binnings,
	LabelsDeflate only if needed (ATR-15812)

2017-02-06  Frank Winklmeier  <fwinkl@cern>
	* TrigServices-20-10-16
	* src/HltEventLoopMgr.cxx: Fix build failure (ATR-15756), Coverity fixes (17299, 111973)
	* src/THistSvcHLT.cxx: Fix gcc6 indentation warning

2017-01-27  Frank Winklmeier  <fwinkl@cern>
	* TrigServices-20-10-15
	* src/HltEventLoopMgr.cxx: Fix build failure due to Gaudi changes (ATR-15756)


Former-commit-id: 1f4da6471b22c8f41c4e2946ee55cdcd8e1d0601

	* Remove pt/athena_wrapper
	* Add generic asetup_wrapper
	* python/hltOksUtils.py: Update cmtconfig tag to gcc62
	* HLTUtils-01-04-00

2016-11-17  Stewart Martin-Haugh <smh@cern.ch>
	* share/make_hlt_env.py: Add cvmfs asetup location
	* HLTUtils-01-03-09


Former-commit-id: 7e12d768a28357d811d2182b9ef878fe0b14a8e5

	* TrigServices-20-10-14
	* Updated ROB history status flag logic


Former-commit-id: 065c16a66f43dbd459d064590a64f4bbd946898f