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Created date
Set DisableLinesDuringVPClosing flag to true
!1714
· created
Jul 18, 2024
by
Kate Abigail Richardson
RTA/2024.08.12-AugMD
2024-patches
PR/AllenInMoore_hlt1_bandwidth
PR/Moore_hlt2_and_spruce_bandwidth
PR/full_throughput_test
RTA
ci-test-triggered
priority
high
Merged
65
updated
Oct 10, 2024
MuonID NN and ElectronIDNN optimisation. Use of constant memory in general for LipschitzNN instances
!1634
· created
May 14, 2024
by
Adrian Casais Vidal
RTA/2024.08.12-AugMD
2024-patches
PR/AllenInMoore_hlt1_bandwidth
PR/Moore_hlt2_and_spruce_bandwidth
PR/full_throughput_test
RTA
ci-test-triggered
needs ref update
Merged
+2
179
Approved
updated
Sep 20, 2024
Tune LambdaLLDetachedTrack and XiOmegaLLL lines
!1457
· created
Feb 24, 2024
by
Marian Stahl
RTA/2024.06.03-JuneTS
2024-patches
2024
data-selections
PR/AllenInMoore_hlt1_bandwidth
RTA
ci-test-triggered
needs ref update
Merged
58
Approved
updated
Jul 02, 2024
Add inclusive jet line
!1372
· created
Nov 11, 2023
by
Thomas Boettcher
RTA/2024.08.12-AugMD
2024-patches
IFT
PR/AllenInMoore_hlt1_bandwidth
RTA
ci-test-triggered
hlt1-throughput-decreased
needs Allen ref update
needs ref update
Merged
180
Approved
updated
Nov 21, 2024
Added DiElectron High Mass lines
!1315
· created
Sep 01, 2023
by
Laurent Dufour
PR/AllenInMoore_hlt1_bandwidth
RTA
RTA WP3
ci-test-triggered
impact
low
needs Allen ref update
needs ref update
priority
high
Merged
77
Approved
updated
Feb 19, 2024
Exclusive D02KsHH HLT1 line
!559
· created
Apr 20, 2021
by
Edward Brendan Shields
RTA/2024.08.12-AugMD
2024-patches
PR/AllenInMoore_hlt1_bandwidth
RTA
RTA WP3
backport RTA/2024.06.03
ci-test-triggered
impact
low
needs Allen ref update
needs ref update
priority
low
Merged
133
Approved
updated
Jul 10, 2024