Reshape a bit the readout map to allow for errors

The new version of the readout map seems to be working, but is delicate to use as any run that has no link conditions attached to it will see 0 banks being activated, leading to lots of messages and possible segmentation faults.

This MR changes the messages and activates all banks and links by default if no bank is found to be active.

FT/FTDAQ/include/FTDAQ/FTReadoutMap.h

@@ -224,10 +224,24 @@ inline void FTReadoutMap::readFile1( const Gaudi::Algorithm* parent, const YAML:
   m_sourceIDs.clear();
   m_sourceIDs.reserve( sourceIDs.size() );
 #ifdef USE_DD4HEP
-  const auto activatedBank = [&deLHCb]( int sourceID ) { return deLHCb.tell40links( sourceID ).has_value(); };
-  const auto activatedLink = [&deLHCb]( int sourceID, int iLink ) {
-    return deLHCb.tell40links( sourceID )->isEnabled( iLink );
+  // Warding against possibilities that no bank is activated.
+  bool ignore = true;
+  for ( auto sourceID : sourceIDs )
+    if ( deLHCb.tell40links( sourceID ).has_value() ) {
+      ignore = false;
+      break;
+    }
+  if ( ignore )
+    parent->warning() << "No SourceID activated for this run. This may mean that conditions are too old to support "
+                         "automatic link/bank deactivation. Activating all banks/links."
+                      << endmsg;
+  const auto activatedBank = [&deLHCb, &ignore]( int sourceID ) {
+    return ( ignore || deLHCb.tell40links( sourceID ).has_value() );
+  };
+  const auto activatedLink = [&deLHCb, &ignore]( int sourceID, int iLink ) {
+    return ( ignore || deLHCb.tell40links( sourceID )->isEnabled( iLink ) );
   };
+
 #else
   // Put this to ignore unused parameter warning
   (void)deLHCb;
@@ -239,6 +253,9 @@ inline void FTReadoutMap::readFile1( const Gaudi::Algorithm* parent, const YAML:
     if ( activatedBank( sourceID ) )
       m_sourceIDs.push_back( LHCb::Detector::FTSourceID{static_cast<unsigned int>( sourceID )} );
   m_nBanks = m_sourceIDs.size();
+  if ( m_nBanks != sourceIDs.size() )
+    parent->info() << "Deactivated " << sourceIDs.size() - m_nBanks << " banks." << endmsg;
+
   // Make the map of hardware links with switchings
   const auto& allLinks = rInfo["LinkMap"].as<std::vector<int>>();
   if ( allLinks.size() != sourceIDs.size() * FTRawBank::BankProperties::NbLinksPerBank ) {
@@ -247,6 +264,7 @@ inline void FTReadoutMap::readFile1( const Gaudi::Algorithm* parent, const YAML:
                               std::to_string( sourceIDs.size() * FTRawBank::BankProperties::NbLinksPerBank ) + ")",
                           __FILE__, StatusCode::FAILURE );
   }
+  unsigned int nLinksDeactivated( 0 );
   for ( unsigned int i = 0; i < m_sourceIDs.size(); i++ ) {
     // Find the corresponding line in the cabling map
     const auto   sourceID = m_sourceIDs[i];
@@ -262,12 +280,12 @@ inline void FTReadoutMap::readFile1( const Gaudi::Algorithm* parent, const YAML:
         throw GaudiException( "Incoherent readout map for bank n." + std::to_string( i ), __FILE__,
                               StatusCode::FAILURE );
       }
-      if ( !( activatedLink( sourceID, j ) ) ) {
+      if ( !( activatedLink( sourceID, j ) ) && temp[j] != LHCb::Detector::FTChannelID::kInvalidChannel() ) {
+        nLinksDeactivated++;
         parent->debug() << "Deactivating link " << temp[j].toString() << endmsg;
         temp[j] = LHCb::Detector::FTChannelID::kInvalidChannel();
       }
     }
-
     // Now create the SiPMID->linkID index array
     std::array<int, FTRawBank::BankProperties::NbLinksPerBank> temp_SiPM; // SiPMID->linkID
     temp_SiPM.fill( -1 );
@@ -293,6 +311,7 @@ inline void FTReadoutMap::readFile1( const Gaudi::Algorithm* parent, const YAML:
     m_SiPMMap[i] = temp_SiPM;          // SiPMID->linkID
     m_linkOrdering.push_back( false ); // TODO: check ordering there
   }
+  if ( nLinksDeactivated != 0 ) parent->info() << "Deactivated " << nLinksDeactivated << " links." << endmsg;
 }
 
 // Version 0 for decoding versions <=6