TMRG crashes when referencing a field of an undeclared structure
Summary
TMRG fails when a file references a field a.b
of a structure which has not been declared. Using undeclared types is currently allowed, but the checks in place should be skipped.
Reported by @anookala.
Describe your setup
N/A
TMRG Version
65fb51370504c956
Steps to reproduce
undecl.sv
module tb;
test_t a;
logic b;
initial begin
b = a.ciao;
end
endmodule
then run:
> tmrg undecl.sv
What is the current bug behavior?
TMRG crashes:
Traceback (most recent call last):
File "/projects/TSMC65/Picosec/V2.0/workAreas/apaterno/FastIC/fastrich_rtl/venv/bin/tmrg", line 11, in <module>
load_entry_point('tmrg', 'console_scripts', 'tmrg')()
File "/projects/TSMC65/Picosec/V2.0/workAreas/apaterno/FastIC/fastrich_rtl/utils/tmrg/tmrg/tmrg.py", line 2346, in main
tmrg.elaborate()
File "/projects/TSMC65/Picosec/V2.0/workAreas/apaterno/FastIC/fastrich_rtl/utils/tmrg/tmrg/tmrg.py", line 1798, in elaborate
VerilogElaborator.elaborate(self, allowMissingModules=allowMissingModules)
File "/projects/TSMC65/Picosec/V2.0/workAreas/apaterno/FastIC/fastrich_rtl/utils/tmrg/tmrg/verilog_elaborator.py", line 1704, in elaborate
self.elaborate_file(file, is_lib=False)
File "/projects/TSMC65/Picosec/V2.0/workAreas/apaterno/FastIC/fastrich_rtl/utils/tmrg/tmrg/verilog_elaborator.py", line 1647, in elaborate_file
self._elaborate(moduleItem)
File "/projects/TSMC65/Picosec/V2.0/workAreas/apaterno/FastIC/fastrich_rtl/utils/tmrg/tmrg/verilog_elaborator.py", line 1346, in _elaborate
self._elaborate(t)
File "/projects/TSMC65/Picosec/V2.0/workAreas/apaterno/FastIC/fastrich_rtl/utils/tmrg/tmrg/verilog_elaborator.py", line 1346, in _elaborate
self._elaborate(t)
File "/projects/TSMC65/Picosec/V2.0/workAreas/apaterno/FastIC/fastrich_rtl/utils/tmrg/tmrg/verilog_elaborator.py", line 1346, in _elaborate
self._elaborate(t)
[Previous line repeated 2 more times]
File "/projects/TSMC65/Picosec/V2.0/workAreas/apaterno/FastIC/fastrich_rtl/utils/tmrg/tmrg/verilog_elaborator.py", line 1341, in _elaborate
self.elaborator[name](tokens)
File "/projects/TSMC65/Picosec/V2.0/workAreas/apaterno/FastIC/fastrich_rtl/utils/tmrg/tmrg/verilog_elaborator.py", line 1083, in _elaborate_reg_reference
available_fields = current_sig.namespace.types[current_sig.data_type].fields
KeyError: 'test_t'
What is the expected correct behavior?
TMRG should skip the checks on the field and just continue.
Relevant logs and/or screenshots
already posted above
Possible fixes
Check for the type existence before looking its fields up.
Edited by Andrea Paterno