Add support for Systemverilog localparam
Problem to solve
SystemVerilog LRM (IEEE 1800-2017) allows defining localparam
with an explicit type (see section 6.20 and 6.20.1).
This represents an extension of the verilog parameter definition (IEEE 1364-2001 section 3.11.1, Syntax 3-4).
Currently, TMRG does not support explicitly typed localparam
s.
Target audience
Proposal
-
Add this module to the list of tests (failure expected) -
Modify the tool to add the support for this code snippet
What does success look like, and how can we measure that?
- Newly added test passes.