Add support for always_ff and asynchronous reset
Problem to solve
SystemVerilog LRM (IEEE 1800-2017) allows defining always_ff
with synchronous and asynchronous reset (see section 9.2.2.4).
Currently, TMRG does not support an asynchronous reset defined in the sensitivity list.
Target audience
Proposal
-
Add this module to the list of tests (failure expected) -
Modify the tool to add the support for this code snippet
What does success look like, and how can we measure that?
- Newly added test passes.