Clean-up and changes for 1.28 Gbps
MR includes various changes for going to 1.28 Gbps as a default:
-
Minor fixes to eye diagram: Fix delay setting computation, flags for printing out raw error count values and skipping configuration step
-
Added function for reading and setting just the virtual chip registers (used by the eye diagram script)
-
Script for updating existing configs from 640 Mbps to 1.28 Gbps
-
First draft of data merging check scripts (for both 4-to-1 and 2-to-1 data merging) - will likely need some tweaking, and implementation of a proper procedure for getting data merging to work, but for now return link quality for each chip, like:
-
Update to documentation, clean up of the existing ones (specifically
pcie
andinstall
), mention of eye diagram in therd53a
andrd53b
pages, and dedicated guide for switching firmware.