FELIG working into master

Hi @fschreud,

I’m asking for this merge request to get FELIG working again in the master branch. This fix is comprised of three changes:

• One of the options of the MGT IP KCU_RXBUF_PMA_QPLLTXGTREF1_CPLLRXGTREF0 was wrong. This was fixed and a new .xci generated.
• The constraint felig_top_BNL712_v2.0.xdc needed to be updated after one of the PCIe wupper entities’ name changed from u1 to ep0.
• The script helper/do_implementation_post.tcl also needed some changes. Namely, adding the FELIG firmware mode to some of the ifs as well as a specific if else if for this mode. Lastly, EMU_GENERATE_REGS was missing from set_property generic.

With these fixes, we were able to see FELIG data being read by FELIX.

I proceeded to merge master into the branch with these changes, only with some conflicts on helper/do_implementation_post.tcl, that I could easily fix. However, after that, I tried to generate a final bit file but had some issues, with something that I think you are already aware of. I got the same error as Kai and proceeded with Vivado 2020.1. It compiled with no issues and the tests were successful once again.

Let me know if you have any questions

Cheers, Ricardo

PS: Tagging @mtrovato.