Draft: New multithreaded pile-up digitization components
This MR demonstrates the new multithreaded pile-up digitization components.
The name and location (Projects/MinbiasMem) are temporary and will be changed when these components are moved into a new MR that I submit for merging.
EDIT: Looks like there are some extra changes in here from merging in master. The important bit is in Projects/MinbiasMem.