Enable lpGBT clock and fibre on condition
Fibre channel of VTRx+ and clock output of lpGBT master should only be turned on if the chips are physically there. Condition should be tied to components.py
Fibre channel of VTRx+ and clock output of lpGBT master should only be turned on if the chips are physically there. Condition should be tied to components.py
added enhancement feature labels
assigned to @ddaniele
3-enable-lpgbt-clock-and-fibre-on-condition
to address this issue created branch 3-enable-lpgbt-clock-and-fibre-on-condition
to address this issue
mentioned in merge request !13 (merged)
mentioned in commit 171e4e47
closed with merge request !13 (merged)
reopened
While the work on VTRx+ QLD v1.3 is done we could also disable the unused fibres in case we have a VTRx+ QLD v1.2.
This can be done by using the else
condition here and setting something like:
vtrx.write_read("CxCR", "CxCEN", 0)
where x
the channel number.
I believe the for
loop has to be moved outside the if self.vtrx_v == "1.3":
condition as well.
3-enable-lpgbt-clock-and-fibre-on-condition
to address this issue created branch 3-enable-lpgbt-clock-and-fibre-on-condition
to address this issue
mentioned in merge request !18 (merged)
closed with commit 2dc4b31b