Combinatorial path in AXI read transaction
I've just tested the changes done to fix #53 (closed), I no longer see any issue on transactions without pipelining or to undefined addresses (so I think we can now close #53 (closed)).
However the read transaction now breaks AXI specification A3.2.1 "... there must be no combinatorial paths between input and output signals" (at least with pipelining deactivated).
This is what is generated (all statements in asynchronous processes or outside processes). There is a combinatorial path from arvalid
to arready
:
arready <= rd_ack_int;
rd_ack_int <= rd_req;
rd_req <= arvalid and not (axi_rip or axi_rdone);