add licensing to the project and clean the top level

See merge request be-cem-edl/diot/FMC-nanoFIP/fmc-nanofip-gw!11

try ci4fpga with libero 11.9

See merge request be-cem-edl/diot/FMC-nanoFIP/fmc-nanofip-gw!10

Bring evergreen

See merge request be-cem-edl/diot/FMC-nanoFIP/fmc-nanofip-gw!9

TRST_N was not driven by JTAG core

* Tested in hardware the modification

Closes #4

See merge request be-cem-edl/diot/FMC-nanoFIP/fmc-nanofip-gw!8

Increase time reset output to carrier

Closes #3

See merge request be-cem-edl/diot/FMC-nanoFIP/fmc-nanofip-gw!5

Rename signals that control the (de)assertion of the RSTON signal to be independent of the value. Define new constants to refer the WIDTH and the values of the counter that controls RSTON state.

Refer to issue #<3>

Constants defined:
- c_CARRIER_COUNTER_RST_LGTH
- c_CARRIER_COUNTER_RST_ASSERT
- c_CARRIER_COUNTER_RST_DEASSERT

Signals renamed:
- s_var_rst_c_is_seven to s_var_rst_c_deassert
- s_var_rst_c_is_three to s_var_rst_c_assert

Resolve "add CI CD"

Closes #1

See merge request be-cem-edl/diot/FMC-nanoFIP/fmc-nanofip-gw!4

manifest mod triggers CI/CD

- remove blank spaces from sdc file

clean up project:

* remove duplicity in contraints
* added script for build the gateware
* added documentation to evergreen style

Closes #2

See merge request be-cem-edl/diot/FMC-nanoFIP/fmc-nanofip-gw!3

remove duplicity in contraints and added script for build the gateware. Add documentation to evergreen style

- pinout and iostd changes for v3

See merge request be-cem-edl/diot/FMC-nanoFIP/fmc-nanofip-gw!1

HDL: jtag pins are now in 'Z' when IDLE. Pull down specified for TDI, TMS in constraint. FIX in the TCL for building the project

Set the JTAG pins in the top level design to be 'Z' so as to program the RT-SB without unpluging the fmc-nanonip. Tested in V2 SB but needs to be done in a more elegant way

Remove the define_clock from Synplufy_Constraint.sdc since it is declared also in the other sdc file. Added build_nanofip.tcl script to automate the build of the project

- synthesis with Synplify Premier (DFF triplication with the tmr attribute; RAM triplication "manually" on the code)