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commented VENDOR_FPGA from generic_dpram_mod.v

David Belohrad requested to merge remove_vendor_fpga into master

Using VENDOR_FPGA compilation directive causes quartus not to compile for the memories with address space larger than 4k. If using VENDOR_FPGA, the only way how to circumvent the 4k issue is to increase the quartus verilog loop:

set_global_assignment -name VERILOG_CONSTANT_LOOP_LIMIT

which causes significant delays in analysis of the circuit. (In case of 16-bit address space the additional delay is larger than 10 minutes).

By disabling VENDOR_FPGA another implementation of the memory is used, which does not cause the issue.

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