Slice test runner script & associated improvements
Implemented slice test runner script, and improved single-board algo test runner. As part of this:
- Add classes representing monitorable objects, metrics and main components of board model (e.g. optical modules, FPGA I/O ports)
- Add implementation of parameter/settings pool, and code for parsing corresponding config file (YAML).
- Added example config files
Scripts tested on Serenity boards in building 904, with v0.3.5 of the Serenity plugin.
Finally, I had to temporarily remove the armv7 CI jobs, since I'm currently getting 404 from EPEL armhfp repo
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