Draft: Completing the DAQ Block for the Full DTC Builds
Closes #46
The goal of this PR should be to
- Scale the DAQ firmware block for the full (P5) DTC builds (2S, PS-5G, PS-10G).
- Ensure it closes timing at 360 MHz.
Edited by Andrew Mastronikolis
Merge request reports
Activity
changed milestone to %Installation at P5
added Medium Priority label
assigned to @amastron
removed review request for @dmonk
added 1 commit
- 99816c17 - attempt to put data aggr but with pblocking on it
added 1 commit
- 7ff8f14d - ci test for image generation inside artifacts
added 1 commit
- 842647d7 - rmed pblocking the data aggr that crashed the ci
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