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Increase number of FE modules to 4

Merged David Gabriel Monk requested to merge four-module-test into master
3 files
+ 18
6
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@@ -139,7 +139,7 @@ port map(
--==============================--
genGBTExtractor: for i in 0 downto cNumberOfFEModules - 1 generate
genGBTExtractor: for i in 0 to cNumberOfFEModules - 1 generate
--==============================--
signal ipb_to_channel : ipb_wbus;
@@ -215,6 +215,18 @@ trigger_window_upper <= control_registers(1)(3 downto 0);
trigger_window <= trigger_window_upper & trigger_window_lower;
pRouteSTubsToOutput: process(clk_p)
begin
if rising_edge(clk_p) then
for i in 0 to cNumberOfFEModules - 1 loop
q(cDTCOutputLinkMap(i)).valid <= stubs(i).valid;
q(cDTCOutputLinkMap(i)).data <= stubs(i).data;
q(cDTCOutputLinkMap(i)).strobe <= '1';
end loop;
end if;
end process;
pHistogram: process(clk_p)
begin
if rising_edge(clk_p) then
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