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Commit 0d0c91aa authored by David Gabriel Monk's avatar David Gabriel Monk
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Update dependencies.yml

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Stage: Static Analysis
    Stage: Make Project
      Stage: Pre-build Checks
        Stage: Synthesis
          Stage: Implementation
            Stage: Package
              Stage: Upload to Registry
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                ...@@ -41,7 +41,7 @@ sources: ...@@ -41,7 +41,7 @@ sources:
                url: https://gitlab.cern.ch/gbtsc-fpga-support/gbt-sc.git url: https://gitlab.cern.ch/gbtsc-fpga-support/gbt-sc.git
                dtc: dtc:
                branch: link-aggregator branch: master
                url: https://gitlab.cern.ch/cms-tracker-phase2-data-processing/BE_firmware/dtc.git url: https://gitlab.cern.ch/cms-tracker-phase2-data-processing/BE_firmware/dtc.git
                verilog-ethernet: verilog-ethernet:
                ......
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