Update file emp_payload.vhd

top/charm/firmware/hdl/emp_payload.vhd

@@ -60,9 +60,8 @@ architecture rtl of emp_payload is
     signal ipb_from_slaves              : ipb_rbus_array(N_SLAVES - 1 downto 0);
 
     signal fe_control_registers         : ipb_reg_v(0 downto 0);
-    signal fe_status_registers          : ipb_reg_v(0 downto 0);
+    signal fe_status_registers          : ipb_reg_v(0 downto 0); 
     signal mproc_control_registers      : ipb_reg_v(1 downto 0);
-    signal mproc_status_registers       : ipb_reg_v(0 downto 0);
     signal link_aggr_control            : ipb_reg_v(0 downto 0);
 
 
@@ -71,13 +70,14 @@ architecture rtl of emp_payload is
     signal ipb_chain                    : ipbdc_bus_array(cNumberOfFEModules downto 0);
     signal stubs                        : ldata(cNumberOfFEModules - 1 downto 0);
     signal header_array                 : tCICHeaderArray(cNumberOfFEModules*cNumberOfCICs - 1 downto 0) := (others => ('0', (others => '0'), (others => '0'), (others => '0')));
-    signal header_start_array, header_start_array_buffered : std_logic_vector(cNumberOfFEModules*cNumberOfCICs - 1 downto 0) := (others => '0');
+     signal header_start_array, header_start_array_buffered : std_logic_vector(cNumberOfFEModules*cNumberOfCICs - 1 downto 0) := (others => '0');
     
     signal eth_link_out                 : ldata(3 downto 0)                        := (others => LWORD_NULL);
 
     
 
     -- MProcessor
+    constant cNumberOfMProcessors                  : integer                                  := 1;
     signal mprocessor_ipb_chain                    : ipbdc_bus_array(cNumberOfMProcessors downto 0);
     signal srst                                    : std_logic                                := '0';
     signal ttc_resync_reset, ttc_resync_reset_prev : std_logic                                := '0';
@@ -129,7 +129,7 @@ begin
     --==============================--
     fe_channel_ctrl : entity work.ipbus_ctrlreg_v
     --==============================--
-    generic map(
+    generic map (
         N_CTRL    => 1,
         N_STAT    => 1
     )
@@ -271,13 +271,13 @@ begin
     -- L1 Data Aggregator
     --==============================--
 
-    pBufferL1Data : process(clk_p)
-    begin
-        if rising_edge(clk_p) then
-            daq_data_buffered <= daq_data;
-            daq_empty_buffered <= daq_empty;
-        end if;
-    end process pBufferL1Data;
+    -- pBufferL1Data : process(clk_p)
+    -- begin
+    --     if rising_edge(clk_p) then
+    --         daq_data_buffered <= daq_data;
+    --         daq_empty_buffered <= daq_empty;
+    --     end if;
+    -- end process pBufferL1Data;
 
     --==============================--
     L1DataAggregator : entity work.L1DataAggregator
@@ -285,8 +285,8 @@ begin
     port map (
         --- Input Ports ---
         clk_p   => clk_p,
-        daq_in  => daq_data_buffered,
-        empty   => daq_empty_buffered,
+        daq_in  => daq_data,
+        empty   => daq_empty,
         --- Output Ports ---
         read    => daq_read,
         --- IPBus Ports ---
@@ -478,8 +478,6 @@ begin
     q(24).strobe <= '1';
 
 
-
-
     bc0     <= '0';
     gpio    <= (others => '0');
     gpio_en <= (others => '0');