cvorg: added support to feed the PLL with an external clock.
The implemented algorithm to find the proper values has one handicap:
it finds good values for all the parameters except the 'r'. The PLL
doesn't lock.
Forcing 'r' equals 500, the algorithm calculates the other values and
the PLL is locked. The beneath problem seems to be a restriction in the
value of this parameter but in the datasheet was not found anything.
This is a work-around for the specific application of our client.
The client will feed the CVORG's PLL with an external clock of 10 MHz (PS
reference).
Signed-off-by:
Samuel Iglesias Gonsalvez <siglesia@cern.ch>
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- cvorg/ad9516/ad9516.c 152 additions, 24 deletionscvorg/ad9516/ad9516.c
- cvorg/ad9516/libad9516.h 1 addition, 1 deletioncvorg/ad9516/libad9516.h
- cvorg/driver/clkgen.c 49 additions, 7 deletionscvorg/driver/clkgen.c
- cvorg/driver/cvorg-skel.c 7 additions, 1 deletioncvorg/driver/cvorg-skel.c
- cvorg/include/ad9516.h 7 additions, 2 deletionscvorg/include/ad9516.h
- cvorg/include/libcvorg.h 1 addition, 0 deletionscvorg/include/libcvorg.h
- cvorg/lib/cvorg.c 49 additions, 2 deletionscvorg/lib/cvorg.c
- cvorg/test/cvorgtest.c 51 additions, 16 deletionscvorg/test/cvorgtest.c
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