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Michel Arruat's avatar
Michel Arruat authored
MenA25 is using MSI interrupt. All the interrupt sources (DMA, VME
        interrupt, Bus Error,..) are implemented in the FPGA as different
        interrupt sources registers, but, all of them are mapped into a single
        MSI irq vector. If 2 irqs are generated close to each other two MSI are
        generated, but they are served in  a single IRQ handler execution. In
        this case, immediately after we exit from the irq handler, we re-enter
        to irq handler as a result of another MSI (for the 2nd irq that we
        already handled in the 1st execution of irq handler). This MSI was
        qualified as spurious IRQ which is not true and is due to the
        implementation in the FPGA
        We have decided to not count anymore SPURIOUS interrupt which anyway,
        in theory, cannot happen with MSI because it is not shared.

Signed-off-by: default avatarMichel Arruat <michel.arruat@cern.ch>
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