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ME0 reorganized such that an OH refers to a whole chamber with 8 GBTs and 24 VFATs; ipb_clk async with axi_clk; FIFO resets synchronous with wr_clk, CSC working slow control

Evaldas Juska requested to merge evka-dev into devel

MAJOR_VERSION

  • ME0 reorganized such that an OH refers to a chamber and has 8 GBTs and 24 VFATs, and should support addressing on all of them. * move CSC SYSTEM module to the same address as GEM_SYSTEM to make the LAST_TRANS_ERR have the same address (used to determine bus error)
  • added an option to have ipb_clk async with axi_clk (used on CVP13 due to high axi_clk frequency), also fixed a few csc related things HDLC addresses are now configurable for each VFAT (defaults are set according to station and should work on the latest GEBs)
  • reworked resets of all FIFOs to be synchronous with the wr_clk
  • reworked link mapping to support more GBTs, and generalized a bit
Edited by Evaldas Juska

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