Joseph dev

ME0 sbits integration. sbit_me0.vhd module which takes in raw sbits from ME0 and clusterizes them. Clusters then sent on to the trigger module. sbit_me0 has an ila_debugger which can be instantiated by setting constant CFG_DEBUG_SBIT_ME0 to 'true'. User can access sbit rates, and raw sbits for a selectable vfat through register interface (sbit_me0.xml address table added). sbit_me0 is only instantiated when GEM_STATION=0.

rate_counter32_multi.vhd added which outputs the rate (in Hz) for multiple std_logic_vectors (all sharing one timer). Outputted rate counters for each input are 32 bits wide.