Tags

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b88v0.1.64-6

4b790d6e · New hog · May 14, 2019

b87v0.1.64-5

b2356fd7 · Debug Hog · May 13, 2019

Preliminary version for merge request 87 for branch feature/MGTAllFPGAs to branch master

b87v0.1.64-6

b2356fd7 · Debug Hog · May 13, 2019
b87v0.1.64-4

6fe8315b · Debug Hog · May 13, 2019

b87v0.1.64-3

731a1117 · Add ttc clock back to fpga1 · May 08, 2019

Preliminary version for merge request 87 for branch feature/MGTAllFPGAs to branch master

b87v0.1.64-2

b9cc8e5e · fix xml list files again · May 07, 2019

Preliminary version for merge request 87 for branch feature/MGTAllFPGAs to branch master

b87v0.1.64-1

f41ed0c0 · fix xml list files · May 07, 2019

Preliminary version for merge request 87 for branch feature/MGTAllFPGAs to branch master

b87v0.1.64-0

ac6797f4 · Merge branch 'master' into feature/MGTAllFPGAs · May 07, 2019

Preliminary version for merge request 87 for branch feature/MGTAllFPGAs to branch master

v0.1.63

c1868919 · modified file FIFO_TO_MGT_RAW_FSM to change event header from 3C to 7C to identify RAW data · Apr 29, 2019
```
Version: v0.1.63
```
b85v0.1.63-1

c1868919 · modified file FIFO_TO_MGT_RAW_FSM to change event header from 3C to 7C to identify RAW data · Apr 29, 2019
```
Preliminary version for merge request 85 for branch feature/readout_dev_4 to branch master
```
b85v0.1.63-0

3054cad7 · added constraint to target MUXF* to LUTs to reduce congestion for ALGO BLOCK · Apr 26, 2019
```
Preliminary version for merge request 85 for branch feature/readout_dev_4 to branch master
```
v0.1.62

52248150 · Update wave file · Mar 07, 2019
```
Version: v0.1.62
```

b84v0.1.62-0

52248150 · Update wave file · Mar 07, 2019

Preliminary version for merge request 84 for branch feature/readout_safe_mode_dev_2 to branch master

b83v0.1.62-2

f90b1d8d · put back synchronisation into RAW data readout using 40M_LD clock signal · Feb 25, 2019
```
Preliminary version for merge request 83 for branch feature/TOB_rdout_safe_mode_dev to branch master
```

b83v0.1.62-1

68eacecb · changed the ILA clock from RX_USERCLK to 160MHz clock · Feb 25, 2019

Preliminary version for merge request 83 for branch feature/TOB_rdout_safe_mode_dev to branch master

b83v0.1.62-0

1d4f7171 · set reset values to ZERO · Feb 20, 2019

Preliminary version for merge request 83 for branch feature/TOB_rdout_safe_mode_dev to branch master

v0.1.61

ff5957ae · fixed error in fsm_TOB_wr_to_FIFO.vhd · Feb 07, 2019
```
Version: v0.1.61
```

b82v0.1.61-2

ff5957ae · fixed error in fsm_TOB_wr_to_FIFO.vhd · Feb 07, 2019

Preliminary version for merge request 82 for branch feature/TOB_rdout_safe_mode_dev to branch master

b82v0.1.61-1

c32c1196 · continued development of SAFE Mode operation for TOB/XTOB Readout · Feb 05, 2019
```
Preliminary version for merge request 82 for branch feature/TOB_rdout_safe_mode_dev to branch master
```
b82v0.1.61-0

1710ae9d · added cntl FPGA ready signals for RAW and TOB data to top level of Control... · Jan 31, 2019
```
Preliminary version for merge request 82 for branch feature/TOB_rdout_safe_mode_dev to branch master
```

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