xlx_ku_mgt_ip_10g24_stub.vhdl:5 does not have matching formal port for component port gtwiz_buffbypass_rx_reset_in
hi Experts, I am trying to configure the lpgbt-fpga kcu105-1024 design on a kcu102 board. I am currently getting this error (which is definly not because of the board type). The issue seems to be because of the incompitability between the modules and its instatiation within the design. That is why it gives the following errors after synthesis Vivado cannot recognise the Modules as well (may be because of some changes) :