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Commit 01aed0b8 authored by John Derek Chapman's avatar John Derek Chapman Committed by Graeme Stewart
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python/RunDMCFlags.py (RunToTimestampDict): added separate run numbers for... 

python/RunDMCFlags.py (RunToTimestampDict): added separate run numbers for MC16 2016 pPb, 2017 pp, 2018 pp. ATLASSIM-3171. Tagging RunDependentSimComps-00-00-19 (RunDependentSimComps-00-00-19)

	* python/RunDMCFlags.py (RunToTimestampDict): added separate run
	numbers for MC16 2016 pPb, 2017 pp, 2018 pp. ATLASSIM-3171
	* Tagging RunDependentSimComps-00-00-19

2016-10-28  John Chapman  <John.Chapman@cern.ch>

	* python/RunDMCFlags.py (RunToTimestampDict): added 16 new run
	numbers for PHase II upgrade ITK Step 1.6 + FCal. ATLASSIM-3116
	* Tagging RunDependentSimComps-00-00-18

2016-08-18  John Chapman  <John.Chapman@cern.ch>

	* python/RunDMCFlags.py (RunToTimestampDict): added eight new run
	numbers for Phase II upgrade for the ITk ExtBrl4 (Step 1.5) + FCal
	layout. ATLASSIM-3030
	* Tagging RunDependentSimComps-00-00-17

2016-06-15  John Chapman  <John.Chapman@cern.ch>

...
(Long ChangeLog diff - truncated)


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Simulation/RunDependentSim/RunDependentSimComps/python/RunDMCFlags.py
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...@@ -53,11 +53,61 @@ class RunToTimestampDict(JobProperty): ...@@ -53,11 +53,61 @@ class RunToTimestampDict(JobProperty):
240208:1410208000, ##MC15c RUN-4 (ITk LoI+sFCal (large/original LAr gap), mu=80) 240208:1410208000, ##MC15c RUN-4 (ITk LoI+sFCal (large/original LAr gap), mu=80)
240214:1410214000, ##MC15c RUN-4 (ITk LoI+sFCal (large/original LAr gap), mu=140) 240214:1410214000, ##MC15c RUN-4 (ITk LoI+sFCal (large/original LAr gap), mu=140)
240220:1410220000, ##MC15c RUN-4 (ITk LoI+sFCal (large/original LAr gap), mu=200) 240220:1410220000, ##MC15c RUN-4 (ITk LoI+sFCal (large/original LAr gap), mu=200)
240300:1410300000, ##MC15c RUN-4 (ITk ExtBrl4 + sFCal (small LAr gap), mu=0)
240306:1410306000, ##MC15c RUN-4 (ITk ExtBrl4 + sFCal (small LAr gap), mu=60)
240308:1410308000, ##MC15c RUN-4 (ITk ExtBrl4 + sFCal (small LAr gap), mu=80)
240314:1410314000, ##MC15c RUN-4 (ITk ExtBrl4 + sFCal (small LAr gap), mu=140)
240320:1410320000, ##MC15c RUN-4 (ITk ExtBrl4 + sFCal (small LAr gap), mu=200)
240400:1410400000, ##MC15c RUN-4 (ITk InclBrl4 + sFCal (small LAr gap), mu=0)
240406:1410406000, ##MC15c RUN-4 (ITk InclBrl4 + sFCal (small LAr gap), mu=60)
240408:1410408000, ##MC15c RUN-4 (ITk InclBrl4 + sFCal (small LAr gap), mu=80)
240414:1410414000, ##MC15c RUN-4 (ITk InclBrl4 + sFCal (small LAr gap), mu=140)
240420:1410420000, ##MC15c RUN-4 (ITk InclBrl4 + sFCal (small LAr gap), mu=200)
240500:1410500000, ##MC15c RUN-4 (ITk ExtBrl4 (Step 1.5) + sFCal (small LAr gap), mu=0)
240506:1410506000, ##MC15c RUN-4 (ITk ExtBrl4 (Step 1.5) + sFCal (small LAr gap), mu=60)
240508:1410508000, ##MC15c RUN-4 (ITk ExtBrl4 (Step 1.5) + sFCal (small LAr gap), mu=80)
240514:1410514000, ##MC15c RUN-4 (ITk ExtBrl4 (Step 1.5) + sFCal (small LAr gap), mu=140)
240520:1410520000, ##MC15c RUN-4 (ITk ExtBrl4 (Step 1.5) + sFCal (small LAr gap), mu=200)
240600:1410600000, ##MC15c RUN-4 (ITk InclBrl4 (Step 1.5) + sFCal (small LAr gap), mu=0)
240606:1410606000, ##MC15c RUN-4 (ITk InclBrl4 (Step 1.5) + sFCal (small LAr gap), mu=60)
240608:1410608000, ##MC15c RUN-4 (ITk InclBrl4 (Step 1.5) + sFCal (small LAr gap), mu=80)
240614:1410614000, ##MC15c RUN-4 (ITk InclBrl4 (Step 1.5) + sFCal (small LAr gap), mu=140)
240620:1410620000, ##MC15c RUN-4 (ITk InclBrl4 (Step 1.5) + sFCal (small LAr gap), mu=200)
240700:1410700000, ##MC15c RUN-4 (ITk ExtBrl4 (Step 1.5) + FCal, mu=0)
240708:1410708000, ##MC15c RUN-4 (ITk ExtBrl4 (Step 1.5) + FCal, mu=80)
240714:1410714000, ##MC15c RUN-4 (ITk ExtBrl4 (Step 1.5) + FCal, mu=140)
240720:1410720000, ##MC15c RUN-4 (ITk ExtBrl4 (Step 1.5) + FCal, mu=200)
240800:1410800000, ##MC15c RUN-4 (ITk InclBrl4 (Step 1.5) + FCal, mu=0)
240808:1410808000, ##MC15c RUN-4 (ITk InclBrl4 (Step 1.5) + FCal, mu=80)
240814:1410814000, ##MC15c RUN-4 (ITk InclBrl4 (Step 1.5) + FCal, mu=140)
240820:1410820000, ##MC15c RUN-4 (ITk InclBrl4 (Step 1.5) + FCal, mu=200)
240900:1410900000, ##MC15c RUN-4 (ITk ExtBrl4 (Step 1.6) + FCal, mu=0)
240906:1410906000, ##MC15c RUN-4 (ITk ExtBrl4 (Step 1.6) + FCal, mu=60)
240908:1410908000, ##MC15c RUN-4 (ITk ExtBrl4 (Step 1.6) + FCal, mu=80)
240914:1410914000, ##MC15c RUN-4 (ITk ExtBrl4 (Step 1.6) + FCal, mu=140)
240920:1410920000, ##MC15c RUN-4 (ITk ExtBrl4 (Step 1.6) + FCal, mu=200)
241000:1411000000, ##MC15c RUN-4 (ITk InclBrl4 (Step 1.6) + FCal, mu=0)
241006:1411006000, ##MC15c RUN-4 (ITk InclBrl4 (Step 1.6) + FCal, mu=60)
241008:1411008000, ##MC15c RUN-4 (ITk InclBrl4 (Step 1.6) + FCal, mu=80)
241014:1411014000, ##MC15c RUN-4 (ITk InclBrl4 (Step 1.6) + FCal, mu=140)
241020:1411020000, ##MC15c RUN-4 (ITk InclBrl4 (Step 1.6) + FCal, mu=200)
241100:1411100000, ##MC15c RUN-4 (ITk ExtBrl4_33mm (Step 1.6) + FCal, mu=0)
241106:1411106000, ##MC15c RUN-4 (ITk ExtBrl4_33mm (Step 1.6) + FCal, mu=60)
241108:1411108000, ##MC15c RUN-4 (ITk ExtBrl4_33mm (Step 1.6) + FCal, mu=80)
241114:1411114000, ##MC15c RUN-4 (ITk ExtBrl4_33mm (Step 1.6) + FCal, mu=140)
241120:1411120000, ##MC15c RUN-4 (ITk ExtBrl4_33mm (Step 1.6) + FCal, mu=200)
241200:1411200000, ##MC15c RUN-4 (ITk IExtBrl4 (Step 1.6) + FCal, mu=0)
241206:1411206000, ##MC15c RUN-4 (ITk IExtBrl4 (Step 1.6) + FCal, mu=60)
241208:1411208000, ##MC15c RUN-4 (ITk IExtBrl4 (Step 1.6) + FCal, mu=80)
241214:1411214000, ##MC15c RUN-4 (ITk IExtBrl4 (Step 1.6) + FCal, mu=140)
241220:1411220000, ##MC15c RUN-4 (ITk IExtBrl4 (Step 1.6) + FCal, mu=200)
267599:1434123751, ##MC15c pp (low mu+LHCf) 267599:1434123751, ##MC15c pp (low mu+LHCf)
271516:1436762129, ##MC15c pp (50 ns bunch spacing, nominal mu) 271516:1436762129, ##MC15c pp (50 ns bunch spacing, nominal mu)
282420:1445073756, ##MC15c pp (beta*=90 m, ALFA) 282420:1445073756, ##MC15c pp (beta*=90 m, ALFA)
284500:1446539185 ##MC15c pp (25 ns bunch spacing, nominal mu) 284500:1446539185, ##MC15c/MC16 pp (25 ns bunch spacing, nominal mu, 2015/2016)
290000:1450000000, ##MC15c/MC16 pPb (2016)
300000:1500000000, ##MC16 pp (25 ns bunch spacing, nominal mu, 2017)
310000:1550000000 ##MC16 pp (25 ns bunch spacing, nominal mu, 2018)
} }
def addEntry( self, run, timestamp, force=False): def addEntry( self, run, timestamp, force=False):
if not type(run) == int: if not type(run) == int:
......
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