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Rocco Ardino
scouting-preprocessor
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unified_interface
4b819c33
·
More fixes to VDHL describing new datatypes
·
Oct 09, 2018
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axi_lite_tests
789a2c81
·
Don't skip bitfile generation if implementation failed
·
Oct 21, 2020
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ctrl_mon_via_bram
ba63c337
·
Connect write bus to bRAM.
·
Feb 08, 2021
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deploy_from_ci
3417533b
·
Build tags only manually, but check syntax
·
Feb 19, 2021
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tjames
a9094c71
·
defaulted to synthesis
·
Feb 07, 2022
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rardino
e22725c6
·
Clean up and more comments
·
Feb 10, 2022
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tjames-temp-merging
6f20b9d5
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minor changes
·
Feb 21, 2022
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feature/suppress_calibration_sequence
8c9c0fb5
·
Suppress calibration data
·
Mar 14, 2022
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tjames-temp-merging-2
27b76aaf
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merge attempt 1
·
Apr 05, 2022
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chore/vivado_2021p1
5e0e1c21
·
Move to Vivado 2021.1
·
Apr 07, 2022
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fix/correct_product_names
a1bf834e
·
Update paths to bitfile and debug probes file
·
Apr 07, 2022
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experiment/fix_timing_errors
6c98ffb5
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Stronger synth and impl directives for timing
·
Apr 26, 2022
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feature/reset_via_scone
e22d4990
·
Use RPM installed version of helper scripts
·
Apr 30, 2022
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master
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protected
125d3714
·
Correct paths to bitfile and probes
·
May 02, 2022
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chore/more_useful_version_regs
419a4b54
·
Make version registers more useful for software
·
May 06, 2022
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experiment/fix_timing_errors_rebase
add4740f
·
Add replicated instances to Stage1
·
May 08, 2022
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