Add module support

This MR introduces the possibility to perform a scan for multiple chips (e.g. on one ore more modules) in series without the need of changing connectors or configuration files in between scans. The scan script needs to be started only once.

In order to realize this the following changes have been made:

• Firmware:
  • Support up to 7 independent Aurora lanes (depending on readout board)
  • Support up to 2 HitOr ports on the BDAQ board to allow self-triggered source scans of for instance a dual module
• Software:
  • Change the format of testbench.yaml
  • Move mask file configuration from scans to chip configuration YAML file
  • Rearrange ScanBase, make BDAQ53 and RD53A work with arbitrary number of Aurora receivers (and 2 HitOrs)
  • Replace local_configuration kwargs in scan scripts by a parameter to be passed on scan class instantiaton
  • Allow per-chip modifications of this local_configuration
  • Allow (per-chip) modifications of chip configuration using dict in local_configuration
  • Change the periphery class to include LV/HV power supplies for multiple modules

---

Should close the following issues:

• close #164 (closed)
• close #228 (closed)

---

TODO:

• Update Wiki

Changes in rd53a_default.cfg.yaml structure (masks configuration):

@@ -23,6 +23,10 @@ calibration:
     offset         : 180
     offset_error   : 60
 
+masks:
+  maskfile              : 'auto'
+  use_good_pixels_diff  : False
+
 # Disable specific pixels
 #disable          :
 #                  - [0, 0]

Changes in testbench.yaml structure (example dual-chip module configuration):

@@ -1,24 +1,35 @@
 general: # General configuration
-  chip_sn             : '0x0000'
-  chip_type           : 'rd53a'
-  chip_id             : 8
-  chip_configuration  : 'auto'                  # Use configuration from this file (either .cfg.yaml or .h5). If set to 'auto', either configuration from last scan o
r default.cfg.yaml is used.
-  send_data           : 'tcp://127.0.0.1:5500'  # Socket address of online monitor
-  output_directory    :                         # Output data directory, default is CWD
+  output_directory    :                         # Top-level output data directory, default is CWD
+  chip_conf_directory :                         # Additional ('bdaq53', 'scans' and chip's output directory are searched first!) path for chip configuration files.^M
+
+# Connected Modules
+modules:
+  module_0:
+    fe_0:
+      chip_type: 'rd53a'
+      chip_sn: '0x0001'                     # Chip serial number
+      chip_id: 0                            # Chip ID
+      receiver: 'rx0'                       # Aurora receiver channel (ranges from 'rx0' to 'rxN', N board-dependent)
+      send_data: #'tcp://127.0.0.1:5500'    # Socket address of online monitor
+      chip_configuration: 'auto'            # Use config from this file (either .cfg.yaml or .h5). If 'auto', either config from last scan or default.cfg.yaml is used.
+    fe_1:
+      chip_type: 'rd53a'
+      chip_sn: '0x0002'                     # Chip serial number
+      chip_id: 1                            # Chip ID
+      receiver: 'rx1'                       # Aurora receiver channel (ranges from 'rx0' to 'rxN', N board-dependent)
+      send_data: #'tcp://127.0.0.1:5500'    # Socket address of online monitor
+      chip_configuration: 'auto'            # Use config from this file (either .cfg.yaml or .h5). If 'auto', either config from last scan or default.cfg.yaml is used.