WIP: Hitor-less bump-connectivity scan
This MR adds the possibility to do hitor-less bump-connectivity scans which is needed for future Quad-Module production (no hitor available). Instead of using the Hitor as the trigger, a FPGA pulser is added in order to send random (fixed, programmable frequency) triggers.
Further, a simpler analysis of the bump-connectivity is added (optional): No poorly connected state, simple cut to define connected bump.
ToDos:
-
compile FW -
add hitor-less bump-connectivity scan -
simplify bump-connectivity analysis
Edited by Marco Vogt