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  • v6.1.0

    6.1.0 - 2023-10-26
    ==================
    Added
    =====
    - drv: hwmon support for better integration with sensors
    - hdl: automatically build ROM version from git tag
    
    Changed
    =======
    - bld: makefile improvements
    - ci: build all software in CI
  • v6.0.4

    21c53031 · update changelog ·
    6.0.4 - 2022-09-12
    ==================
    Added
    =====
    - hdl: update to latest releases of all dependencies
    - hdl: bitstreams now published under https://be-cem-edl.web.cern.ch/
    - sw: support for WRTD FMC-ADC designs
    - sw: support for newer Linux kernels
    
    Fixed
    =====
    - doc: HTML documentation now includes register maps
    - sw: compiler warnings
    
    Changed
    =======
    - bld: many improvements to CI
    - bld: build system cleanup
    - doc: now published under https://be-cem-edl.web.cern.ch/
  • v6.0.3

    6.0.3 - 2022-07-25
    ==================
    Fixed
    -----
    - hdl: fix threshold logic that unders certain conditions was forcing a
    channel to 0
  • v6.0.2

    6.0.2 - 2022-04-05
    ==================
    Changed
    -------
    - hdl: white-rabbit core update
    
    Fixed
    -----
    - hdl: digital noise on SVEC cards by chaning clocking schema
  • v6.0.1

    6.0.1 - 2022-01-11
    ==================
    Changed
    -------
    - hdl: ip_cores have been updated
    
    Fixed
    -----
    - sw: use of invalid pointer that could lead to a kernel oops
    - sw: change completion order to prevent SVEC bugs
  • v6.0.0

    6.0.0 - 2021-09-10
    ==================
    Added
    -----
    - hdl: configurable auto byte swap in hardware, useful for SVEC to reduce software complexity
    - hdl,sw: DMA data is always little-endian
    - sw: software version validation against FPGA version
    - bld: flawfinder check on software tools
    
    Changed
    -------
    - sw: offsets are not anymore in uV but they are just raw values
    
    Fixed
    -----
    - sw: security fixes detected by flawfinder
    - sw: fixes detected by checkpatch.pl
    - sw: style fixes detected by checkpatch.pl
    - sw: improve compatibility with newer ( > 3.10) Linux kernel versions
  • v6.0.0.rc1

    6.0.0 - 2021-09-07
    ==================
    Added
    -----
    - hdl: configurable auto byte swap in hardware, useful for SVEC to reduce software complexity
    - hdl,sw: DMA data is always little-endian
    - sw: software version validation against FPGA version
    - bld: flawfinder check on software tools
    
    Changed
    -------
    - sw: offsets are not anymore in uV but they are just raw values
    
    Fixed
    -----
    - sw: security fixes detected by flawfinder
    - sw: fixes detected by checkpatch.pl
    - sw: style fixes detected by checkpatch.pl
    - sw: improve compatibility with newer ( > 3.10) Linux kernel versions
  • v5.0.4

    5.0.4 - 2021-07-09
    ==================
    Fixed
    -----
    - sw: fix endianess only when required
    - sw: ADC chip reset is BIT(7)
  • v5.0.3

    5.0.3 - 2021-07-05
    ==================
    Added:
    -----
    - bld: CI support
    
    Fixed
    -----
    - doc: add offset units
    - sw: calibration value at boot time incorrect
    - sw: use YAML for fau-calibration
  • v5.0.2

    5.0.2 - 2021-07-03
    ==================
    Fixed
    -----
    - sw: calibration value for ADC were not applied correctly
  • v5.0.1

    5.0.0 - 2021-06-11
    ==================
    Fixed
    -----
    - sw: concurrent DMA transfers are possible thanks to a wait and retry
      algorithm
    - sw: wait 400ms before reading the temperature the first time (the hardware
      takes time to setup the thermometers)
    - doc: use cheby files from hdl instead of special implementations
  • v5.0.0

    5.0.0 - 2021-02-11
    ==================
    Changes
    -------
    - channel sysfs attribute 'chx-offset' does not accept
    mV (milli-volts) values
      anymore. Now the unit is uV (micro-Volts)
      - acquisition sysfs attribute 'decimation' is now named
      'undersample'
      - software trigger is enable by default
      - on DAC offset saturation set the maximum/minimum value instead of
      error
      - the software trigger is not anymore a ZIO attribute. It is now in
      debugfs
    
    Added
    -----
    - multiple trigger sources at the same time
    - trigger threshold per-channel
    - channel sysfs attributes to set trigger threshold
    - sysfs binary attribute to overwrite run-time calibration data
    - add tool to get/set run-time calibration data
    - periodically update gain calibration for DAC and ADC
    - trigger time
    - MBLT support for SVEC
    
    Removed
    -------
    - library is not supported anymore, use
    adc-lib (https://www.ohwr.org/projects/adc-lib)
    - fald-acq tool is not supported anymore, use adc-acq from adc-lib (https://www.ohwr.org/projects/adc-lib)
  • v5.0.0.rc7

    release candidate v5.0.0.rc7
    
    - bugfixes
    - disable gain temperature compensation
  • v5.0.0.rc5

    FMC ADC 100M 14bit 4 channel v5.0.0 release candidate 5
  • v5.0.0.beta3

    Changes:
    - minor fixes
    - use SPDX
  • v5.0.0.beta2

    Added:
    - Calibration data from user
  • v5-beta2

    v5-beta2
    
    - zero offset calculation
    - allow users to overwrite run-time calibration data
    - chage offset unit from mv to uV
    - SDB find device fix