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Added VC709 IP core for full mode transceiver (cpll). Include wrapper VHDL...

Frans Schreuder requested to merge phase2/FLX-1533_VC709LPGBT_fullmodefix into phase2/master_FLX-1533_VC709LPGBT

Added VC709 IP core for full mode transceiver (cpll). Include wrapper VHDL files for all hardware to avoid synthesis error

Closes FLX-1533

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