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Updated date
Stop Vivado GUI at import script
!576
· created
Jul 31, 2024
by
Frans Schreuder
Closed
1
updated
Oct 01, 2024
Resolve FLX-2435 "Phase2/ lpgbt axis clock 240"
!567
· created
Jul 08, 2024
by
Frans Schreuder
Closed
1
updated
Jul 09, 2024
Added FELIG and FMEMU files to VUnit and sigasi files, so changes in FELIX...
!561
· created
Jun 18, 2024
by
Frans Schreuder
Closed
1
updated
Jul 08, 2024
Draft: Removed FIFO's from CRFromHost as a concept for FLX-2337.
!520
· created
Dec 22, 2023
by
Frans Schreuder
Closed
updated
Jun 25, 2024
Draft: Release 4.14
!547
· created
May 03, 2024
by
Frans Schreuder
master
Closed
updated
May 03, 2024
FLX-2369: Added LFSR based reset bit as bit 0 of TTC option 3 (similar to 4 in...
!535
· created
Mar 19, 2024
by
Frans Schreuder
Closed
1
updated
Apr 29, 2024
FLX-2368: Re-enabled processing of tkeep for non-multiples of 4 bytes for all...
!542
· created
Apr 18, 2024
by
Frans Schreuder
Closed
updated
Apr 23, 2024
Draft: Removed debug signals from lcb_frame_sync
!538
· created
Mar 26, 2024
by
Frans Schreuder
Closed
1
updated
Mar 26, 2024
Draft: Fixing FLX-2109 - Implement link sharing for ITkPix V1
!427
· created
Feb 03, 2023
by
Marius Wensing
Closed
updated
Nov 15, 2023
Changed tags from docker to k8s-cvmfs for gitlab runners
!506
· created
Oct 02, 2023
by
Frans Schreuder
Closed
1
updated
Oct 06, 2023
FLX-2300: disable B channel by default for rm5
!507
· created
Oct 06, 2023
by
Frans Schreuder
Closed
1
updated
Oct 06, 2023
Partially reverted changes between b51d27aa3 and 9240aed30, see FLX-2260
!502
· created
Sep 27, 2023
by
Frans Schreuder
Closed
updated
Sep 29, 2023
Draft: Resolve FLX-2213 "Gearbox optimization"
!470
· created
Jun 06, 2023
by
Frans Schreuder
Closed
1
updated
Aug 02, 2023
Added LTI receiver in FMEMU, along with GBT (selectable) and changed toplevel...
!477
· created
Jun 20, 2023
by
Frans Schreuder
Closed
1
updated
Jul 05, 2023
Draft: Release 4.13 xvc ila
!473
· created
Jun 13, 2023
by
Frans Schreuder
master
Closed
updated
Jun 14, 2023
adding HGTD lumi decoding registers to regmap 5 yaml and regenerating VHDL files
!476
· created
Jun 14, 2023
by
Marius Wensing
Closed
1
updated
Jun 14, 2023
Added debug bridge to the PCIe configuration space of endpoint 0, so an ILA...
!446
· created
Mar 20, 2023
by
Frans Schreuder
master
Closed
updated
May 17, 2023
Changed input of clk_wiz_40_0 and clk_wiz_250 to a single input, and use a...
!447
· created
Mar 21, 2023
by
Frans Schreuder
Closed
updated
May 17, 2023
Draft: phase2/FLX-1776_HGTD_Decoding_plus_FLX-1979
!402
· created
Sep 29, 2022
by
Frans Schreuder
Closed
1
updated
Apr 26, 2023
Changed VUNIT simulator to GHDL, and use a docker image with GHDL installed
!452
· created
Apr 11, 2023
by
Frans Schreuder
Closed
updated
Apr 13, 2023
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