PCIe: Sharing dif pair return vias, is this ok?
E.g PCIE.PER1_P/N sharing gnd return vias with adjacent pairs. Could be avoided by staggering where the pairs change layer. Also PCIE.PET3_P via unbalancing PCIE.PET2_N. I think in general the stitching vias could be more symmetric
Edited by Harvey Macdonald Leicester